REPORT NUMBER 4
‘LOGIC DECODING CIRCUITS AND MULTIPLEXERS’
The report presented is the sole work of the author. None of this report is plagiarised (in whole or part) from a fellow student's work, or from any un-referenced outside source.
AIM:
INTRODUCTION:
This experiment is about the design, implementation, and testing of logic decoding circuits. In PART A, an industrial system problem is presented which requires a logic decoding control system. The solution to the problem is a combinatorial logic circuit that takes four (4) logic inputs (Bottle Position B, Water level indicator W, Flow valve position V, and Water filtration system F), and outputs a logic zero if certain conditions are met. This output signal is the control signal to stop the operation of the industrial system. First, logic arithmetic (using a Karnaugh map) is done to develop the logic expression that would satisfy the conditions of the industrial system. Then, the logic expression is implemented in hardware (NAND-only implementation) and tested if the desired operation is achieved. The NAND gates used are the 7400 and 7410 Quad NAND gate chips.
In PART B, the logic solution from PART A is implemented using a multiplexer. The multiplexer used is the 74251 Multiplexer chip.
In PART C, another control system problem is presented, this time an aircraft warning light system. The solution to the problem is a combinatorial logic circuit that takes five (5) logic inputs (Altitude OK or too low ‘A’, Wheels up or down ‘W’, Airspeed OK or too low ‘S’, Flaps up or down ‘F’, and Fuel OK or low ‘P’), and outputs a logic zero if certain conditions are met. First, logic arithmetic (using the Quine-McCluskey procedure) is done to develop the logic expression that would satisfy the conditions of the industrial system. Then, the logic expression is implemented in hardware (NAND-only implementation) and tested if the desired operation is achieved. The NAND gates used are the 7400 and 7410 Quad NAND gate chips.
This experiment is a typical theory applied to practical use to solve an industrial problem. The industrial problems in this experiment are critical ones that are needed to be addressed immediately in industrial operational hours. Therefore, the application of an automatic control system is not just very helpful but also very practical. The devices used are cost-effective; the designs of the control systems are simple and straightforward.
APPARATUS:
Electronic Laboratory Equipment.
PROCEDURE:
As per Laboratory Manual.
RESULTS:
The results are presented in this section.
PART A: COMBINATORIAL LOGIC DECODING
LOGIC OF SYSTEM
P=0 when:
1) (B=0) (v=0) =B.V
2) (W=0) (v=0) = W.V
3) (F=0) (V=1) (W=0) = F.V.W
4) (V=0) ((B=0)+(W=0)) = V(B+W)
p=x when:
1) (W=0) (V=0) = W.V
TRUTH TABLE
KARNAUGH MAP
P=W.V.F+BV
AND/OR CIRCUIT DIAGRAM
NAND/NAND CIRCUIT DIAGRAM
WIRING DIAGRAM
TESTED OUTPUT
PART B: MULTIPLEXER DECODING
CIRCUIT DIAGRAM
WIRING DIAGRAM
TESTED OUTPUT
PART C: PROCESS CONTROL SYSTEM
LOGIC OF SYSTEM
C=0 when:
1) (A=1) (W=0) = A.W
2) (S=0) (W=0) (F=0) = S.W.F
3) (P=0) = P
C=x when:
1) (A=1) (W=1) (F=1) = A.W.F
TRUTH TABLE
PRIME IMPLICANTS LIST
MINIMAL COVER TABLE
C=A.F.P+A.S.P+W.P
AND/OR CIRCUIT DIAGRAM
NAND/NAND CIRCUIT DIAGRAM
WIRING DIAGRAM
DISCUSSION:
The test results of the circuits obtained the desired values.
In PART A, the conversion of word statements to Boolean logic is pretty straightforward. Each statement is equivalent to a logic variable, and the and’s, or’s and not’s can be converted directly to their Boolean counterparts AND, OR and NOT. Then, the truth table can be generated using this Boolean logic. From the truth table, the K-maps can be created. Since the system has 4 inputs, K-map method is suitable. The K-map method is used in order to minimize the number of logic components. The resulting K-map yielded the logic expression:
P=W.V.F+BV
Then, the conversion of AND/OR/NOT to NAND-only is implemented as:
P=WVF∙BV
In PART B, the multiplexer circuitry is derived from the truth table. It is determined that the data inputs D0, D1 and D7 needs to be pulled up to logic 1; inputs D2, D3, and D6 pulled down to logic 0; inputs D4 and D5 be latched to input signal B. The main advantage of using this multiplexer circuit is that it contains lesser number of components (1 IC chip compared to 2 IC chips of NAND-only implementation). Moreover, the control signals utilized are minimized to three (input signals W, V and F), which could possibly equate to less error.
The multiplexer is commonly used for streamlining data inputs. The control signals would decide which data input is passed through at any particular time. A multiplexer works as an intelligent switch that controls several inputs.
The Quine-McCluskey procedure was used because the number of input signals (5) cannot be easily solved using the K-map method (brute force solutions using K-map is only practical up to 4 variables). Since K-map is not appropriate in terms of number of inputs, the Quine-McCluskey procedure is used because it can be used for any number of input variables. The resulting logic expression using Quine-McCluskey procedure is:
C=A.F.P+A.S.P+W.P
CONCLUSION:
The design and implementation of logic decoding circuits were successful. From a control system problem, solutions were developed by generating an equivalent logical expression, and then implementing this logical expression to hardware logic circuits. The truth table, K-map method and the Quine-McCluskey procedure were helpful tools in minimizing the number of circuit components required. The test results showed that if the logical expressions were perfect models of the problems, the circuits would output the correct output signals given the input signal conditions.
