Summary
The given article is about a BiFET GSM-EDGE, which is a power amplifier that consists of a built in circuit to limit current. The collector current is limited to a predetermined level of the value 2.1 Amperes by having a bias circuit incorporated in the power stage of the amplifier thus limiting the HBT cells base current. The power amplifier ruggedness is increased by the given novel scheme in case it is subjected to much mismatch conditions. Furthermore, the matched loads of EDGE and GMSK PAE are maintained in a linear manner. In this paper, current limiting capabilities in the power amplifier within bias circuit are implemented. This way, the output power degradation is minimized and the circuit obtained is fully integrated.
The power amplifiers for handsets should fulfill several requirements so as to be efficient during operation. For example, when the power amplifier is subjected to a great load it should not be damaged. This means that they should be able to withstand the mismatch conditions that may vary to higher values. Failure to meet the condition leads to the design of the circuit being compromised especially on its collector doping leading the peak current to be higher than usual. An external sensing element within a feedback loop together with an error amplifier is used to implement a limiting function for current on a power amplifier. A resistor is used as a sensing element and hence the reason as to why the resistor’s size must be considered while deciding on which size to use. The main reason is the fact that the larger the resistors size, the more it will have an impact on the amplifiers efficiency and power.
The design of a multimode power amplifier has been developed consisting of a bias circuit to limit the current. All the parameters should be considered, for example, Idss and Beta while coming up with a circuit design. From the results obtained in the proposed design of the bias circuit, it is clear that the circuit doesn’t lead to the performance degradation under operation in multimode. The operation mode is selected by the bias current being changed to the stages of the amplifier, and one of its stages is bypassed during EDGE mode operation. Figure 1 shows a HBT power amplifier bias circuit with the power stage, and it can be further modified by using pHEMT with collector Q3 in series as shown in figure 2. Testing on the ruggedness was also done using a PA when disabling and enabling the current limiting. From the results, as seen, the ruggedness performance is superior in the amplifier with current limiting version compared to the one with no current limiting version.
In conclusion, by using of the BiFET technology process, the implementation of bias circuit is practically simplified. When a current limiting feature is incorporated in the circuit, the amplifiers’ ruggedness increases without impacting neither the performance of the amplifier nor its linearity. To avoid damages with power amplifiers, for mobile communications, precautions must be observed during circuit design. This will ensure that the gadgets are able to withstand mismatch conditions that may be high.
Figure 1: Bias circuit used on PA together with RF stage
Figure 2: Bias circuit with pHEMT biased at Idss with the power stage
