Cut Off Region of a Transistor
The transistor goes into the cutoff region when the base current (IB) is equal to zero. The collector leakage current ICEO under such conditions is quite low due to the effect of thermally-generated carriers. This means that ICEO can be neglected in the circuit analysis such that VCE will be equal to VCC. During the cutoff region, both the base-collector and the base emitter junctions are reverse biased. Subscript CEO means a representation of the collector to emitter with the base open. This is represented in the circuit below.
Saturation Region of a Transistor
Forward biasing of the base-emitter junction increases the base current. Consequently, the collector current also increases (IC= βDC*IB).Therefore, the drop across the collector resistor ICRC increases. This leads to a decrease in VCE since VCE =VCC- ICRC. VCE (sat) is the saturation value when VCE reaches the saturation line. Beyond this value of VCE (sat), the collector current cannot increase any further even with any increase in the base current. The base-emitter and base-collector junctions are forward biased. This is represented in the circuit below.
DC Load Line
A representation of the saturation and cutoff curves as relates to the collector characteristic curves is achieved through a load line. The DC load line connects the cutoff and the saturation point. The bottom of the load line represents the ideal cutoff (VCC= VCE and IC=0). The top of the same line represents saturation whereby IC= IC (sat) and VCE= VCE (sat). The region between these two points is the active region of the transistor. The figure below is a representation of a DC load line.
Some BJT Parameters
βDC is the ratio of collector current to base current. This means that it varies with any changes in the collector current. It is also affected by changes in temperature. With junction temperature held constant, IC can be increased, and its effect on βDC noted. βDC increases with an increase in IC up to a certain maximum value. Any increase in the collector current beyond this point results in a decrease in βDC. With the collector current held constant, a direct relationship is observed between the temperature and βDC.
Effect of IC and Temperature on βDC
The value of βDC specified for a certain transistor varies from one transistor to another. The βDC that is specified is the minimum value.
Maximum Transistor Ratings
The maximum ratings of any transistor are always specified in the manufacturer’s datasheet. These are limitations to be considered when using a specific transistor. The maximum ratings normally relate to power dissipation, collector current, emitter-to-base voltage (VEB), VCE, and VCB. VCE and IC cannot have maximum values at the same instant so that the maximum power dissipation is not exceeded.
If VCE is a maximum value, IC can be calculated as PD (max)/ VCE. Similarly, if IC is a maximum value, VCE can be calculated as PD (max)/ IC. It is possible to plot a graph of maximum power dissipation against collector characteristic curves. A particular transistor cannot be operated in the shaded region of the graph. VCE (max) is the limiting voltage rating between points C and D. PD (max) is the limiting rating between points B and C, IC(max) is the limiting current between points B and C. Assuming PD (max) =500MW, VCE (max) =20V, and IC(max) =50mA, the following values can be tabulated and the graph plotted.
Derating PD (max)
The specifications for PD (max) are usually at 25° C. PD (max) is less for temperatures higher than 25 degrees centigrade. A derating factor of 2MW/ ° C shows that the maximum power dissipation is reduced by 2 MW for every degree Celsius increment.
