I/O modules are normally the third most vital constituent of computer systems after the memory and the CPU. The requirements for computer systems are to have an efficient means for receiving inputs and delivering outputs. Computer systems have a variety of peripherals that deliver data at different speeds, in a wider variety of sizes and at different formats. External devices are generally not connected to the expansion or the systems bus structure of computer systems (Tarnoff 350). The problem arises in that I/O modules are slower than the RAM and the CPU, but a handful are actually faster. The word length of the peripheral devices varies from that in the CPU, and data format also varies with one word including parity bits (Stallings 23). With peripheral devices not connected to the bus structure of the computer system, peripheral communications are effectively handled by I/O modules that interface the processor and the memory via a central link and bus or by interfacing one or multiple peripherals through tailored data links.
External devices are used for exchanging data between computers and the external environment. They are also called peripheral devices and are connected to an I/O module. They are basically classified into three main categories that are human readable that communicates with computer users such as the printer, keyboard and the screen, machine-readable which communicates with computer system equipment such as the magnetic disks and the tape systems and communication external devices that is used for communication with remote devices such as the Network Interface card and the modem. The interface between I/O modules and the external devices is made possible through control, status and data signals. The control signal is used to determine the READ and WRITE function that the external device must perform while data is represented in the form of bit sets that are received and sent from any specified I/O module. The status signals are used to specify current state of the external device such as READY and NOT-READY (Tanenbaum 60). The control logic that is associated with external devices is used to control the operation of the devices in response to I/O direction. A transducer is used to convert data from electrical data to other energy forms when the external device is outputting and from other energy forms to electrical form when inputting.
The major functions of I/O module are to control and Timing where it coordinates traffic flow between internal resources such as the systems bus and main memory and external resources. It has the responsibility of controlling CPU communication by communicating with the computer processor using accepting commands from the processor addressing recognition, status reporting and exchanging data (Stallings 357). It allows device communication by communicating with external devices. I/O modules also allow error detection and reporting of the external devices and data buffering which are used to temporarily hold data that is being transferred between external devices and I/O module.
The I/O module is structured in such a way that it connects external devices to the processor through system bus lines. Data is transferred from and to the I/O module through a buffering in one or multiple registers which are used to provide the current status information of the I/O module. In some instances, the status registers also operate as control registers that accept comprehensive control information obtained from the system’s processor. The I/O module logic interacts with processors via control lines. Some control lines are used by the I/O module for status signal and arbitration. I/O modules also have unique addresses that are used to control external devices. There are three main Principles used for I/O mechanisms that include interrupt driven, programmed I/O and Direct Memory access.
In programmed I/O the system’s CPU is indicated as having direct control on the I/O by sensing status, transmitting data and reading and writing commands. Data is basically exchanged between the CPU and the specific I/O module. I/O is continuously and directly under the control of programs that request I/O operations. The CPU waits up to the time when I/O operation has been completed before performing other tasks. The completion of the I/O task is shown by the corresponding change in the module’s status bits. The CPU is occasionally polled by the I/O module when checking its status. In this mechanism, the I/O commands include control which is used to activate peripherals and instruct it what it will do (Stallings 357). Test command is used in testing the various status conditions that are associated with peripherals and I/O modules. The read command is used to cause I/O modules to obtain data items in the peripheral and placing them in the internal buffer. The write command is used to cause the I/O module to grab a given data item from the system’s data bus and then transmitting it to a specified peripheral.
The interrupt-based mechanism is used to overcome CPU waiting, ensuring that there exist no recurrent CPU inspection and that the I/O module only interrupts whenever it is ready. Its basic operation is that the CPU gives a read command, I/O module then obtains data from the peripheral and simultaneously the CPU executes other tasks, and later the I/O module interrupts the CPU, and the CPU asks for the data which will be transferred by the I/O module (Tarnoff 352). When the CPU is interrupted, registers are supposed to be saved in the registers and then it proceeds to process the interrupt by fetching data and storing it. In the case of multiple interrupts, it is assumed that each interrupt has its line of priority, higher priority lines have the capability of interrupting lower priority lines and in the case of bus mastering only master that the current operation can interrupt.
The direct memory addressing is where programmed I/O and interrupt-driven mechanisms require CPU intervention where the CPU is tied up, and the transfer rate is limited. In this mechanism, a large and specialized I/O chip is used to take over the control of the I/O operation in moving large blocks of data. Main memory and I/O module data exchange occurs directly without involving the processor (Stallings 355). Its basic operation is that whenever a processor needs to read or even write a data block, it must issue the appropriate command to the DMA module through sending a read or write signal, the involved I/O device’s specified address, the start position in the memory to be written or read, and number of words to either write or read (Tanenbaum 345). The DMA module will then transfer the whole block of data straight between itself and the memory without involving the system’s processor. After the transfer has been completed, the processor is alerted using the an interrupt signal by the DMA module which means the processor only gets involved at the end and the beginning of the transfer.
Works Cited
Stallings, William. Computer organization and architecture: designing for performance. Pearson Education India, 2000.
Tanenbaum, Andrew S. Structured computer organization. Pearson, 2006.
Tarnoff, David. "Computer Organization and Design Fundamentals." Lulu. com 2005, w języku angielskim (2005).
