Introduction
The Wide-Band Code Division Multiple Access (W-CDMA) is a third generation handset system that achieves high data transmission by utilizing a wider spectrum frequency. Issues that arise in handsets such as a low spectral growth and maintenance of modulation accuracy require a low adjacent channel leakage power ratio (ACLR) especially in the case of the W-CDMA handset systems. High linearization in the portable W-CDMA systems can be improved by increasing the gain compression point that creates the AM-AM distortion. As such this can be achieved by using an on-chip linearizer.
A new on-chip active bias circuit can be used to achieve linearization by compensating the gain compression adaptively to the input power level in order to achieve effective gain compensation and reduce power loss through the linearizer. The composition of the linearizer involves an active bias circuit that is shunted to RF input using a reverse biased diode and utilizes the dynamic admittance of the diode to the input power.
In a handset application, a high linear output can be achieved on the basis of the design of the base circuit of the HBT MMIC power amplifier. The effect of the junction diode bias point decreases following the application of a large RF voltage and current across the base-emitter junction of HBT amplifier. This can be attributed to an increase in the rectified average DC current of the base-emitter diode. Consequently, the base-emitter voltage (VBE) of the HBT amplifier results in a decrease in transconductance hence a gain compression is achieved in the amplifier. In this case, the gain compression is improved by using an on-chip linearizer that will control the base-emitter voltage of the HBT amplifier.
Operating mechanisms of the Linearizer
Figure 1: Circuit Topology of the new Adaptive Linearizer
A partial RF signal is developed by the reverse biased diode to the base node of the bias HBT and HBT4. The power that is received at the base node of HBT4 increases as the input power is increased. Consequently, across the base-emitter diode of HBT4 and HBT3, there is the application of a large RF signal swing. As such, there is an increase in the average DC current and a decrease in the average junction voltage of HBT4. The decrease in the base-emitter voltage of the amplifier HBT, HBT3 is compensated by the decrease of VBE4. An increase in input power of up to 20dBm causes coupling of additional input power to the base of HBT4 as the S21 of the reverse biased diode increases. As such, the VBE4 reduces significantly because of the increased transmission power resulting to an effective compensation of the decreased VBE3 at the compression point.
Circuit Design and Chip implementation
InGaP/GaAs HBT technology was employed in the design and development of the active bias circuit with the adaptive on-chip linearizer. Additionally, this consisted of an input matching network and inter-stage matching network.
Measured Performance
Gain compression point of the amplifier using the reverse biased diode increases by as much as 1.7dB when compared to that of a capacitor of 0.8pF and 4dB when compared to a 0.4pF capacitor. The ACLR of the amplifier with reverse diode improves to over 7.5dB at an output power of 27dBm when compared to using a capacitor 0.4pF and 0.8pF. Thus, the adaptive linearizer achieves high linearity in the reverse biased diode.
